However, so far, no large-area (>1 × 1 μm2), well-regular parallel CeSi 17-AAG order x NW arrays with uniform distribution and identical dimension can be Selleck ACP-196 formed on flat and vicinal Si(100) surfaces. Recently, we have demonstrated that RE metals (e.g., Gd, Ce, and Er) can be self-organized to form a mesoscopically ordered parallel RES NW array on single-domain Si(110)-16 × 2 surfaces [23–25]. These parallel-aligned and unidirectional RES NWs exhibit identical sizes, periodic positions, large aspect ratios (length >1 μm, width ≤5 nm) exceeding 300, and ultra-high integration density up to 104 NWs/μm2.

Such large-area self-ordered growths of massively parallel RES NW arrays on Si(110) surfaces can open the possibility for wafer-scale integration into nanoelectronic devices combining the well-established Si(110)-based integrated-circuit technology [26–28] with the exotic 1D physical properties of RES NWs. To date, there is little knowledge of this template-directed 1D self-organization process that leads to the formation of well-ordered parallel SB203580 in vivo RES NW arrays on single-domain Si(110)-16 × 2 surfaces. In this article, we have investigated the growth evolutions of CeSi x NWs on Si(110) surfaces over a wide range (1 to 9 monolayers (ML)) of Ce coverage by scanning tunneling microscopy (STM).

Our comprehensive study provides a detailed understanding of the 1D self-organization mechanism of perfectly ordered parallel arrays consisting of periodic and atomically identical CeSi x NWs on single-domain Si(110)-16 × 2 surfaces. Methods Our experiments were performed in an ultra-high vacuum, variable-temperature STM system (Omicron Nanotechnology GmbH, Taunusstein, Germany) with a base pressure of less than 3.0 × 10-11 mbar. An n-type P-doped Si(110) surface with a resistivity of about 10 Ω cm was cleaned by well-established annealing procedures [25, 29, 30]. An atomically

about clean single-domain Si(110)-16 × 2 surface was confirmed by STM observation (Figure 1). Different parallel CeSi x NW arrays were produced by depositing high-purity (99.95%) Ce metals with coverages ranging from 1 to 9 ML (1 ML = 9.59 × 1014 atoms/cm2) onto a single-domain Si(110)-16 × 2 surface at 675 K with a deposition rate of 0.15 ML/min and subsequently annealed at 875 K for 20 min. The growth temperature cannot be higher than 675 K; otherwise, a large amount of Ce clusters will be formed [20, 21]. Ce metals were evaporated from an electron-beam evaporator with an internal flux meter; their deposition coverage was determined in situ by a quartz crystal thickness monitor with an accuracy of 20%. The sample temperature was measured using an infrared pyrometer with an uncertainty of ± 30 K. The chamber pressure remained below 1.0 × 10-9 mbar during evaporation. The STM measurements were acquired at 300 K using electrochemically etched nickel tips. Figure 1 STM images and topography profile of the atomically clean Si(110)-16 × 2 surface.